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Download Emu8086 with REAL Serial Key

Tuesday, August 7, 2012 Posted by Glenn 2 comments

So, how to download this emu8086 program for free?
Article by: Glenn Posadas

This emu8086 is cool, better than NASM, MASM or TASM.
I used to program in TASM. I write my assembly language codes and assemble and run them in TASM.
You can write your program in any format, whether in TASM, NASM, MASM format, they are all compatible in emu8086.

Also, in emu8086, you can see the REAL and ACTUAL steps that an assemble does. It means that you can simulate every interrupts in your program :)

TO DOWNLOAD this emu8086:

STEP 1: CLICK HERE!
or if that link isn't working, visit the emu8086 official website: http://ziplib.com/emu8086/

STEP 2: INSTALL the program

STEP 3: insert this key, (NOTE THIS IS FROM http://www.serialportal.com/d.php) That site is cool. :) they give real keys. Thanks to them!


User:ISHAAN,glaitm    Key:27R3VDEFYFX4N0VC3FRTQZX
User:ISHAAN,glaitm    Key:27R3VDEFYFX4N0VC3FRTQZX

THEN VOILA!!!! IF you really want to help the developers of the emu8086 program, then buy your very OWN serial key from them! :)
-glenn


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Best Book for Abused Child

Posted by Glenn 0 comments

This is the best book for all child that were abused!
additional tags: Best Book for Abused Child, Best Books for Children who were abused. Abused Children books. Best Books for Child Abused, Best book for Children who are abused by their parents, Best reading book for all those Child Abused, Best book for Sexual Abused Children

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Complete Instruction Set and Instruction Timing of 8086 microprocessors

Sunday, August 5, 2012 Posted by Glenn 1 comments

APPENDIX C. INSTRUCTION SET AND INSTRUCTION TIMING OF 8086 Instruction Set of 8086 source: The X86 Microprocessors: Architecture and Programming (8086 to Pentium) In this table, the complete set of instructions of the 8086 has been listed, with their mnemonic and function. For knowing the details (format and examples) of each of the instruction, the section in the text book, where they are discussed is given in the third column of the table.


Data Transfer Instructions
MnemonicFunctionSectionTable
MOVMove byte or word to register or memory3.2.13.1
IN, OUTInput byte or word from port, output word to port5.23.1
LEALoad effective address3.2.23.1
LDS, LESLoad pointer using data segment, extra segment3.1
PUSH, POPPush word onto stack, pop word off stack3.2.43.1
XCHGExchange byte or word3.1
XLATTranslate byte using look-up table3.2.33.1




    1. Logical Instructions
      MnemonicFunctionSectionTable
      NOTLogical NOT of byte or word (one's complement)3.7
      ANDLogical AND of byte or word3.7
      ORLogical OR of byte or word3.7
      XORLogical exclusive – OR of byte or word3.7
      TESTTest byte or word (AND without storing)3.7

      Shift and Rotate Instructions
      MnemonicFunctionSectionTable
      SHL, SHRLogical shift left, right byte or word by 1 or CL3.6.13.8
      SAL, SARArithmetic shift left, right byte or word by 1 or CL4.7.33.8
      ROL, RORRotate left, right, byte or word by 1 or CL3.6.23.8
      RCL, RCRRotate left, right, through carry, byte or word by 1 or CL3.6.23.8

      Arithmetic Instructions
      MnemonicFunctionSectionTable
      ADDAdd byte or word3.4.23.4
      SUBSubtract byte or word3.4.33.4
      ADCAdd byte or word and carry3.4.23.4
      SBBSubtract byte or word and carry (borrow)3.4.33.4
      INCIncrement byte or word3.4.23.4
      DECDecrement byte or word3.4.33.4
      NEGNegate byte or word (two's complement)3.4
      CMPCompare byte or word (subtract without storing)3.4.43.4
      MULMultiply byte or word (unsigned)3.4.53.4
      DIVDivide byte or word (unsigned)3.4.63.4
      IMULInteger multiply byte or word (signed)4.7.23.4
      IDIVInteger divide byte or word (signed)4.7.23.4
      CBW, CWDConvert byte to word, word to double word4.73.4
      AAAASCII adjust for addition4.5.13.4
      AASASCII adjust for subtraction4.5.23.4
      AAMASCII adjust for multiplication4.5.33.4
      AADASCII adjust for division4.5.33.4
      DAA, DASDecimal adjust for addition, subtraction (binary coded decimal numbers)4.4.23.4

      Jump and Loop Instructions
      MnemonicFunctionSectionTable
      JMPUnconditional jump3.3.1 and 3.3.2
      JA (JNBE)Jump if above (not below or equal)3.3
      JAE (JNB)Jump if above or equal (not below)3.3
      JB (JNAE)Jump if below (not above or equal)3.3
      JBE (JNA)Jump if below or equal (not above)3.3
      JE (JZ)Jump if equal (zero)3.3
      JG (JNLE)Jump if greater (not less or equal)4.2
      JGE (JNL)Jump if greater or equal (not less)4.2
      JL (JNGE)Jump if less (not greater nor equal)4.2
      JLE (JNG)Jump if less or equal (not greater)4.2
      JC, JNCJump if carry set, carry not set3.3
      JO, JNOJump if overflow, no overflow4.2
      JS, JNSJump if sign, no sign4.2
      JNP (JPO)Jump if no parity (parity odd)3.3
      JP (JPE)Jump if parity (parity even)3.3
      LOOPLoop unconditional, count in CX3.3.3
      LOOPE (LOOPZ)Loop if equal (zero), count in CX3.3.3
      LOOPNE (LOOPNZ)Loop if not equal (not zero), count in CX3.3.3
      JCXZJump if CX equals zero3.3

      Call and Return Instructions
      MnemonicFunctionSectionTable
      CALL, RETCall, return from procedure4.2.2 and 4.2.3
      INT, INTOSoftware interrupt, interrupt if overflow8.3 and 8.2.5
      IRETReturn from interrupt8.1.1

      String Instructions
      MnemonicFunctionSectionTable
      MOVSMove byte or word string4.1.14.1
      CMPSCompare byte or word string4.1.24.1
      SCASScan byte or word string4.1.34.1
      LODS, STOSLoad, store byte or word string4.1.44.1
      REPRepeat4.1
      REPE, REPZRepeat while equal, zero4.1
      REPNE, REPNZRepeat while not equal (not zero)4.1

      Processor and Flag Control Instructions
      MnemonicFunctionSectionTable
      STC, CLC, CMCSet, clear, complement carry flag3.4.1
      STD, CLDSet, clear direction flag4.1
      STI, CLISet, clear interrupt enable flag
      LAHF, SAHFLoad AH from flags, store AH into flags3.1
      PUSHF, POPFPush flags onto stack, pop flags off stack3.1
      ESCEscape to external processor interface13.2.1
      LOCKLock bus during next instruction6.4.4
      NOPNo operation (do nothing)6.5.1
      WAITWait for signal on TEST input13.2.1
      HLTHalt processor6.3.5
    2. Instruction Timing of 8086
      1. Number of cycles expended in calculating the 'Effective Address'
        No.Addressing modeNo. of clocks for calculation of EA
        1Direct6
        2Register indirect5
        3Register relative9
        4Based indexed with BP as the base register8
        5Based indexed with BX as the base register7
        6Relative based indexed with BP as the base register12
        7Relative based indexed with BX as the base register11
      2. Number of clock cycles expended for each instruction of 8086
        CodeDescription8086
        AAAASCII adjust for addition8
        AADASCII adjust for division60
        AAMASCII adjust for multiplication83
        AASASCII adjust for subtraction8
        ADCAdd with carry
         reg to reg3
         mem to reg9+EA
         reg to mem16+EA
         immed to reg4
         immed to mem17+EA
         immed to acc4
        ADDAddition
         reg to reg3
         mem to reg9+EA
         reg to mem16+EA
         immed to reg4
         immed to mem17+EA
         immed to acc4
        ANDLogical AND
         reg to reg3
         mem to reg9+EA
         reg to mem16+EA
         immed to reg4
         immed to mem17+EA
         immed to acc4
        CALLCall a procedure
         intrasegment direct19
         intrasegment direct
         through register16
         intrasegment direct
         through memory21+EA
         intrasegment direct28
        CBWConvert byte to word2
        CLCClear carry flag2
        CLDClear direction flag2
        CLIClear interrupt flag2
        CMCComplement carry flag2
        CMPCompare
         reg to reg3
         mem to mem9+EA
         reg to mem9+EA
         immed to reg4
         immed to mem10+EA
         immed to acc4
        CMPS/Compare string/
        CMPSB/Compare byte string/
        CMPSWCompare word string
         Not repeated22
         REPE/REPNE CMPS/CMPSB/CMPSW9+22/rep
        CWDConvert word to doubleword5
        DAADecimal adjust for addition4
        DASDecimal adjust for subtraction4
        DECDecrement by 1
         16-bit reg3
         8-bit reg3
         memory15+EA
        DIVUnsigned division
         8-bit reg80–90
         16-bit reg144–162
         8-bit mem(86–96)+EA
         16-bit mem(150–168)+EA
        ESCEscape
         reg2
         mem8+EA
        HLTHalt2
        IDIVInteger division
         8-bit reg101–112
         16-bit reg165–184
         8-bit mem(107–118)+EA
         16-bit mem(171–190)+EA
        IMULInteger multiplication
         8-bit reg80–98
         16-bit reg128–154
         8-bit mem(86–104)+EA
         16-bit mem(134–160)+EA
        INInput from I /O port
         Fixed port10
         Variable port through DX8
        INCIncrement by 1
         16-bit reg3
         8-bit reg3
         mem15+EA
        INTInterrupt
         type=352
         type351
        INTOInterrupt if overflow
         interrupt taken53
         interrupt not taken4
        IRETReturn from interrupt32
        JA /Jump if above /16, noj 4
        JNBEJump if not below or equal
        JAE /Jump if above or equal16, noj 4
        JNBJump if not below/
        JNAJump if not above
        JCXZJump if CX is Zero18, noj 6
        JE/Jump if equal /16, noj 4
        JZJump if Zero
        JG/Jump if greater16, noj 4
        JNLEJump if not less, or equal
        JGE/Jump if greater or equal /16, noj 4
        JNLJump if not less
        JL /Jump if less/16, noj 4
        JNGEJump if not greater, or equal
        JLE/Jump if less or equal /16, noj 4
        JNGJump if not greater
        JMPJump
         intrasegment direct short15
         intrasegment direct15
         intersegment direct15
         intrasegment indirect
         through memory18+EA
         intrasegment indirect
         through register11
         intrasegment indirect24+EA
        JNE/Jump if not equal /16, noj 4
        JNZJump if not Zero
        JNOJump if not overflow16, noj 4
        JNP/Jump if not parity/16, noj 4
        JPOJump if parity odd
        JNSJump if not sign16, noj 4
        JOJump if overflow16, noj 4
        JP/Jump if parity/16, noj 4
        JPEJump if parity even
        JSJump if sign16, noj 4
        LAHFLoad AH from flags4
        LDSLoad pointer using DS/
        LESLoad pointer using ES16+EA
        LEALoad effective address2+EA
        LOCKLock bus2
        LODS/Load string/
        LODSBLoad byte string
        LODSWLoad word string
         not repeated12
         repeated9+13/rep
        LOOPLoop17, noj 5
        LOOPE/Loop if equal /
        LOOPZLoop if zero18, noj 6
        LOOPNE /Loop if not equal /
        LOOPNZLoop if not zero19, noj 5
        MOVMove
         acc to mem10
         mem to acc10
         reg to reg2
         mem to reg8+EA
         reg to mem9+EA
         immed to reg4
         immed to mem10+EA
         reg to SS/DS/ES2
         mem to SS /DS /ES8+EA
         segment reg to reg2
         segment reg to mem9+EA
        MOVS/Move string /
        MOVSB/Move byte string/
        MOVSWMove word string
         Not repeated18
         REP MOVS/MOVSB/MOVSW9+17/rep
        MULUnsigned multiplication
         8-bit reg70–77
         16-bit reg118–133
         8-bit mem(76–83)+EA
         16-bit mem(124–139)+EA
        NEGNegate
         reg3
         mem16+EA
        NOPNo operation3
        NOTLogical NOT
         reg3
         mem16+EA
        ORLogical OR
         reg to reg3
         mem to reg9+EA
         reg to mem16+EA
         immed to acc4
         immed to reg4
         immed to mem17+EA
        OUTOutput to I /O port
         fixed port10
         varible port8
        POPPop word off stack
         reg8
         segment reg8
         memory17+EA
        POPFPop flags off stack8
        PUSHPush word onto stack
         reg11
         segment reg:ES/SS/CS10
         memory16+EA
        PUSHDPush double flag onto stack10
        RCLRotate left through carry /
         Rotate right through carry /
         reg with single-shift2
         reg with variable-shift8+4 / bit
         mem with single-shift15+EA
         mem with variable-shift20+EA+4 / bnit
        RETReturn from procedure /
        RETFReturn far /
        RETNReturn near
         intrasegment16
         intrasegment with constant20
         intrasegment26
         intrasegment with constant25
        ROL/Rotate left
        RORRotate right
         reg with single-shift2
         reg with variable-shift8+4 / bit
         mem with single-shift15+EA
         mem with variable-shift20+EA+4 /bit
        SAHFStore AH into flags4
        SAL/Shift arithmetic left /
        SAR /Shift arithmetic right /
        SHL/Shift logical left /
        SHRShift logical right
         reg with single-shift2
         reg with variable-shift8+4/ bit
         mem with single-shift15+EA
         mem with variable shift20+EA+4 / bit
        SBBSubtract with borrow
         reg from reg3
         mem from reg9+EA
         reg from mem16+EA
         immed from acc4
         immed from reg4
         immed from mem17+EA
        SCAS/Scan string /
        SCASBScan byte string
        SCASWScan word string
         not repeated15
         REPE /REPNE SCAS /SCASB /SCASW9+15/rep
        STCSet carry flag2
        STDSet direction flag2
        STISet interrupt flag2
        STOS/Store string /
        STOSB/Store byte string /
        STOSWStore word string
         Not repeated11
         REP STOS/STOSB/STOSW9+10/rep
        STRStore task register
        SUBSubtraction
         reg from reg3
         mem from reg9+EA
         reg from mem16+EA
         immed from acc4
         immed from reg4
         immed from mem17+EA
        TESTTest
         reg with reg3
         mem with reg9+EA
         immed with acc4
         immed with reg5
         immed with mem11+EA
        WAITWait while TEST pin
         not asserted4
        XADDExchange and add
        XCHGExchange
         reg with acc3
         reg with mem17+EA
         reg with reg4
        XLAT/Translate11
        XORLogical exclusive OR
         reg with reg3
         mem with reg9+EA
         reg with mem16+EA
         immed with acc4
         immed with reg4
         immed with mem17+EA

additional tags: 8086 microprocessors instruction, instruction sets, instruction sets for 8086, instruction complete set, instruction set complete for 8086, assembly language instruction set, complete 8086 instruction sets microprocessors, complete instruction timing and instruction sets for 8086 microprocessors.

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